Fable 5 Auto-Designs RP2350 Board, Experiment Published
Fable 5 autonomously designed an RP2350 E-ink development board. The experiment highlights 65 inspection errors and parts selection issues.
A development board equipped with the RP2350A was generated through autonomous design by Fable 5. An experimental record of a small board for driving an E-ink display has been published. The designer imposed a condition of no intervention in the process. According to reporting of a6mzero.com via LolPython on Lobsters, a board proposal was output after several hours of autonomous work. The board measures 31.8×37.32mm and has a 4-layer construction. It is a case showing the current state of electronic design automation by artificial intelligence.
The design originated from a concept two years in the making. The author had wanted to design a simple board, assemble it, and get it working. He initially tried generation with Claude Opus 4.8, but it ended in failure. It did not understand component orientation and could not handle routing properly. Disappointed by this result, he concluded the tools were immature. Fable 5 then emerged.
The trial was started 10 hours before the weekly usage quota reset. A retry was decided upon in the limited time on Thursday night. The author imposed two rules on himself. The policy was to eliminate intervention and verification, and to have Fable solve even pre-manufacturing problems.
No manual edits or verification of the board. Every problem I face before manufacturing will be solved by Fable.
This declaration is tantamount to handing over one’s wallet. The author stuck strictly to the standpoint of an end user. He avoided involvement in the design stage and conveyed only requirements in short text. The request was for an RP2350-based development board to drive an E-ink display. After several hours of autonomous operation, the design was output. Video showed the board shape immediately after it was obtained from KiCad.
Background of Automatic Design by Fable 5
Instructions to Fable 5 were deliberately kept short. No detailed constraints or bill of materials were given. The requirements were limited to the purpose of the development board and its main components. All design decisions were left to the artificial intelligence. This approach is close to the user experience of contract manufacturing. It is a structure in which the customer states specifications and receives the result.
Conventional electronic design assistance assumed interactive operation. Humans handled iterative corrections to placement and routing. Fable 5 aims to automate this process. Its distinctive feature is that it proceeded from placement to routing in several hours of continuous operation. Rather than generation speed or operability, autonomy becomes the evaluation criterion. It demonstrated the possibility that even users without design knowledge could place an order.
A comparison with Claude Opus 4.8 is also recorded. In the earlier trial, errors in component orientation were conspicuous. The routing was reportedly unusable in practice. Fable 5 showed improvement in the soundness of placement. The author praised the front-side placement as beautiful. The back-side routing still remained rough.
As reported in sqlite-utils 4.0rc2, Claude Fable Finds Critical Bug, Claude-based design assistance has achieved results in error detection. This case did not target detection, but verified the generation aspect. Taken together, they indicate an expansion of the scope of assistance. The iteration between inspection and generation is becoming the core of automation. The designer’s role is shifting toward instructing and accepting.
65 DRC Errors and Component Selection Challenges
The initial design contained 65 DRC errors. DRC refers to the design rule check process. Checking on a colleague’s advice revealed numerous violations. Following the rules, the author told Fable only of the existence of the errors. He did not fix them himself, leaving the response to the artificial intelligence. The iteration of error notification and regeneration is the main subject of verification in the experiment.
The front-side component placement was generally good. Two clear errors were pointed out. One is the SPI flash in the upper left. It is a device for storing firmware and saved data. The selected part number is W25Q128JVS. It is a product corresponding to a wide-body SOIC-8 package.
However, the footprint on the board side was for SOP-8. The mounting dimensions did not match, and the component would not fit the footprint. The other is the transistor in the lower left. It is used to switch the boost converter in the E-ink driver circuit. Here too the package selection was inappropriate. The component was too small for the footprint.
The problem became apparent when entering the data into JLCPCB. The mismatch became visible at the stage of submitting the manufacturing data. The author conveyed this fact to Fable and discussed it. Fable insisted that an SOP-8 package existed. However, no match was found in the LCSC parts library. Alignment between component selection and the assembly library remained as an issue.
The component selection capability itself was highly evaluated. Most components had been chosen in line with their purposes. Errors were concentrated in package mapping. It was a divergence between the logic on the schematic and the physical shape for implementation. The artificial intelligence is coming to understand circuit function. Even so, weakness remains in the precision of mounting dimensions.
Hands-Off Experimental Method and
Manufacturing Results
The distinctive feature of the experiment is thorough non-intervention. The prohibition of manual correction and verification is unusual. All pre-manufacturing obstacles are to be solved by the artificial intelligence. This condition means abandoning quality assurance. It was carried out with full awareness of the risk of bearing the cost. A board cost of 26 euros was recorded per unit.
Manufacturing proceeded through outsourcing. The data was processed through JLCPCB’s system. Judgment of assemblability depended on the manufacturer’s display. The author left the designer’s standpoint and behaved as a client ordering the work. Communication was in plain English writing only. It is an attempt at board design without touching the tools.
This method increases reproducibility and transparency. No correction by human tacit knowledge is mixed in. The real capability of the artificial intelligence is recorded as is. Both failures and successes remain as outputs of the process. It has the advantage of clarifying evaluation criteria. It is a method suited to measuring the level of achievement without exaggeration.
The video showed the board immediately after generation. The state of placement and routing can be confirmed. The front side is orderly, while the back side shows conspicuous disorder. The routing traces show forced detours. Even so, the fact that it was given shape in a short time is noteworthy. It reached a starting point as a prototype.
Prototype Board Specifications and Current
Manufacturing Process
The main specifications of the prototype board are clear. The outline is a small rectangle measuring 31.8×37.32mm. The layer structure is 4-layer, supporting high density. The computing device is the RP2350A. The display is a 1.54-inch E-ink. The resolution is set to 200×200 pixels.
The memory device is 8MB QSPI flash. High-speed connection with external memory is assumed. The cost is 26 euros per unit. This is a restrained level for small-lot prototyping. It reflects the benefit of using the contractor’s mass-production infrastructure. The cost barrier for personal prototyping is lowering.
Driving E-ink requires a boost circuit. This is because rewriting the display requires high voltage. Switching with a transistor was incorporated. The package error occurred in this peripheral circuit. Implementation accuracy of the power system directly affects yield. Power supply design is important even for small-scale boards.
Coordination between manufacturing data and parts procurement is also an issue. JLCPCB and LCSC information are closely related. Matching design data with stocked packages is essential. The artificial intelligence was insufficient in verifying consistency between the two. Confirming the actual existence in the assembly library will be a condition for automation. It should be recorded as a future improvement point.
Editorial Opinion
On short-term impact. This case is seen to change evaluation methods for electronic design assistance in the 3-to-6-month range. Hands-off generation experiments may be shared, with DRC error counts and package mismatches becoming established as comparative indicators. Assistance equipped with coordination functions for contract manufacturing is assessed to be preferred.
On the long-term perspective. In the 1-to-3-year range, the usage pattern of ordering prototype boards from plain-language text is seen to spread. Verification of consistency with parts libraries and validation of power circuits are assessed to become the focus of automation. Layers without design knowledge may join prototyping, potentially invigorating low-volume, high-mix development.
Questions from the editorial team. Who should bear responsibility for package errors, the client or the artificial intelligence? Is a process that has 65 inspection errors autonomously corrected trustworthy? If usage that entrusts funds spreads, will compensation systems for manufacturing failures be called into question?
References
- “This PCB is brought to you by Fable 5”, by a6mzero.com via LolPython — Lobsters, 2026-09-13T18:00:25.000Z (ARR)
- Source URL: https://a6mzero.com/posts/this-pcb-is-brought-to-you-by-fable-5/
Frequently Asked Questions
- What is new about this board design by Fable 5?
- What is new is that an E-ink development board equipped with the RP2350A was autonomously generated from plain English instructions alone, without human intervention for correction or verification. It was recorded as an experiment that output a KiCad board proposal in several hours and proceeded to outsourced manufacturing.
- What are the 65 DRC errors and component package errors?
- DRC errors refer to violations of design rules such as routing and spacing. In this case, 65 were detected. A mismatch between the wide-body SOIC-8 W25Q128JVS and the SOP-8 footprint, and a dimensional mismatch of the transistor for the boost circuit were confirmed, making physical implementation consistency the challenge.
- What are the specifications and cost of the prototype board?
- It is a 31.8×37.32mm 4-layer board, equipped with the RP2350A, a 1.54-inch 200×200-pixel E-ink display, and 8MB QSPI flash. It was outsourced for manufacturing at 26 euros per unit, showing the cost level for personal prototyping.
Comments