Tenstorrent Publishes GCC Patches for RISC-V Core "Ascalon XG"
Tenstorrent has published GCC patches for the RISC-V core Ascalon XG. Export variant with reduced cryptographic extensions may be emerging.
Tenstorrent has posted compiler patches to the GNU Compiler Collection (GCC) mailing list for a new RISC-V CPU core, the “Ascalon XG”. It is a derivative model of the existing Ascalon X core, and according to Phoronix’s Michael Larabel, this is the first time the core’s existence has been publicly confirmed.
What Is the Ascalon XG?
Tenstorrent’s Ascalon X is known as a high-performance out-of-order RISC-V RVA23 core that surpasses the company’s H and S models. The Ascalon XG revealed in this patch is a variant of this Ascalon X. The GCC patch describes it as “the global version of Ascalon X”, with the target identifier “tt-ascalon-xg”.
Examining the patch contents, the Ascalon XG has almost the same configuration as the existing Ascalon X support, except that the RISC-V vector cryptography extension set “zvkng” has been excluded. Phoronix’s report points out that the combination of reduced cryptographic capabilities and lower throughput suggests it may be an export model for China and similar markets.
Remaining Extension Instruction Set
Even with zvkng removed, the Ascalon XG continues to support the following extension instructions: rva23s64, zfbfmin, zfh, zkr, zvbc, zvfbfmin, zvfbfwma, zvfh, zvl256b, smaia, smmpm, smnpm, smrnmi, smstateen, ssaia, ssstrict, and svadu. Functions other than vector cryptography remain comprehensively present, and general-purpose computing performance appears equivalent to that of the Ascalon X.
From the standpoint of U.S. Export Administration Regulations, cryptographic technology is likely to be subject to restrictions. It can be inferred that the Ascalon XG’s intentionally reduced cryptographic extensions are part of a product plan premised on regulatory circumvention.
GCC Integration Process
Currently, the Ascalon XG patch is awaiting review on the GCC mailing list. Tenstorrent continues its work to integrate compiler support for its RISC-V CPU cores upstream, and this patch is part of that effort. The GCC 16.2 release improved stability with 102 bug fixes, and support for such new hardware is expected to be included in future releases as well.
In the RISC-V ecosystem, compiler support for new cores is typically provided ahead of the hardware launch. The submission of the Ascalon XG patch suggests that actual chips using this core will reach the market in the near future.
Editorial Opinion
In the short term, the arrival of the Ascalon XG could accelerate the fragmentation of product lineups in the RISC-V market. Tenstorrent’s preparation of an export-regulation-compliant model signals a strategic intention to maintain its presence in the Chinese market. This is in line with the similar measures that x86 and ARM suppliers have been taking.
In the long term, the key point of interest is how much of the market a RISC-V core stripped of cryptographic extensions can win. One of RISC-V’s strengths is its open ecosystem, and how the presence or absence of cryptographic features affects adoption decisions remains an unverified area. In applications with limited cryptographic requirements, such as automotive and IoT, demand may concentrate on models that do not run afoul of export regulations.
How will RISC-V ISA extension instructions deal with geographic regulations, and in what actual products will the Ascalon XG be deployed? Close attention should be paid to Tenstorrent’s next move.
References
- “Tenstrorrent Posts GCC Compiler Patches For Ascalon XG Core”, by Michael Larabel — Phoronix, 2026-08-12T20:14:37.000Z (ARR)
- Source URL: https://www.phoronix.com/news/Tenstorrent-Ascalon-XG-GCC
Frequently Asked Questions
- What is the difference between the Ascalon XG and the Ascalon X?
- The Ascalon XG is a derivative model of the Ascalon X. The main difference is that the RISC-V vector cryptography extension "zvkng" has been excluded. The other extension instruction sets and the basic architecture are shared, and it is presumed to be an export model for global markets.
- Why were the cryptographic extensions removed?
- Under U.S. Export Administration Regulations, cryptographic technology is likely to be subject to restrictions. According to Phoronix's report, the Ascalon XG is very likely an export model for China and other markets, and the cryptographic functions appear to have been deliberately excluded to avoid regulations.
- What kind of company is Tenstorrent?
- Tenstorrent is a RISC-V-based processor design company whose CTO is Jim Keller. It is promoting the development of high-performance CPU cores and the expansion of the RISC-V ecosystem, and the Ascalon series is positioned within its core product family.
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