Intel Introduces PISA, Enables LEO by Default on Nova Lake

Intel on September 17, 2026, released Intel Compute Runtime 26.35.39758.10, its GPU compute stack. It is a monthly feature update for both Windows and Linux, updating the OpenCL and Level Zero driver layers together. According to reporting by Michael Larabel at Phoronix, the release centers on a default configuration change for next-generation processors and initial support for a new ISA specification.

This version includes multi-layered extensions for external integration and management features. Rather than mere bug fixes, changes anticipating the transition to next-generation architectures stand out. As a compute environment for developers, it affects both operations and portability.

Kernel integration and management-related extensions were also advanced. Preparations for accepting Nova Lake S in Linux environments are steadily progressing. Combined with the kernel-side support reported in Linux 7.3 to Bring Stable Support for Intel Nova Lake S Integrated GPU, the foundation for use is falling into place.

LEO Enabled by Default on Nova Lake

OpenCL LEO is an approach that implements OpenCL on top of the Level Zero API. Unlike conventional direct device control, it abstracts execution via Level Zero. It debuted as an experimental implementation early this year and has gained functionality with each release.

In this update, the LEO driver is enabled by default for next-generation Nova Lake S processors on Linux. Reporting by Michael Larabel at Phoronix describes the change as follows:

enabling the OpenCL LEO driver by default for upcoming Nova Lake S processors on Linux

The target is NVL-S, corresponding to the next-generation desktop parts, with the default path switching from the new generation onward. The configuration will select execution via LEO even without developer awareness. Because the premises for validation and performance tuning will change, corresponding evaluation will be required.

On the OpenCL side, support for the cl_khr_spirv_queries extension was added. Groundwork related to cl_khr_command_buffer is also progressing. Multiple changes for LEO have been bundled, strengthening the foundation for command buffers and query functions.

Experimental Status Continues for Existing GPUs

On existing integrated and discrete GPUs, LEO remains experimental. The default execution path remains the conventional OpenCL driver. LEO can only be tested when explicitly selected by the user.

This distinction can be seen as a measure to limit confusion during the transition period. It is a two-step approach that defaults to LEO on new processors while preserving behavior on current hardware. It aims to limit impact on production pipelines and encourage gradual migration.

Developers need to pay attention to behavioral differences by target device. Even with the same OpenCL application, characteristics may vary depending on the implementation path. When measuring performance or analyzing errors, explicitly stating the driver path used will be important.

Initial Support for Portable ISA

Specification PISA

This version adds initial support for the Intel Portable ISA, PISA format. PISA is a portable instruction set architecture specification for Intel GPUs. It defines a programming model and instruction set for general-purpose parallel programming.

The v0.1 document targets both portability, performance, and extensibility. The original goals are as follows:

Provide a stable, portable ISA for compilers targeting Intel GPUs Provide “close-to-the-metal” performance comparable to native machine ISA code Facilitate advanced programming support such as hand-written libraries and inline assembly

First, providing a stable, portable ISA for compilers. Second, ensuring close-to-the-metal performance comparable to native machine code. Third, promoting advanced programming support such as hand-written libraries and inline assembly.

This positioning can be evaluated as close to NVIDIA’s NVPTX. It serves as an intermediate target for compilers, not tied to a specific device generation. Intel is also working to upstream a PISA backend within the LLVM compiler infrastructure.

Sysman and Kernel Integration Enhancements

Multiple extensions were also added to Sysman, which handles device management. A telemetry API implementation was newly integrated. Initial support for composite temperature was also added.

Initial support for reading memory vendor IDs is also included. It can be used as baseline data for configuration management, inventory tracking, and failure analysis. In operating large-scale compute clusters, identifying individual devices is important.

For external semaphores, enablement of external semaphores based on host functions was implemented. A new hook for applying OpenVINO-related AIL was also added. These are changes affecting integration with inference frameworks and inter-device synchronization design.

In Linux-specific changes, event host synchronization wait via integration with the kernel driver was enabled. It ties waiting for event completion to kernel-side mechanisms. This can be seen as a change that will improve wait efficiency and accuracy.

Crescent Island Progress and Availability

Enablement work related to Crescent Island is also continuing. This version adds enabling of deferred backing, among other changes. Multiple related changes have been bundled, advancing preparation for the next-generation architecture.

Crescent Island is positioned as the next graphics architecture. Compute Runtime support is groundwork ahead of hardware release. Deferred backing is a technique that delays resource allocation, increasing flexibility for startup and migration.

The new Intel Compute Runtime is available on GitHub. It is positioned as a monthly update and is provided for both Windows and Linux. It should be incorporated into development environment update plans.

Editorial Opinion

On short-term impact. With LEO enabled by default on Nova Lake S, the premises for OpenCL validation on Linux will change. Over the next three to six months, reports on differences in execution times and command-buffer behavior are expected to increase. Adjustments to compilers and operational procedures will proceed in development environments.

On the long-term perspective. PISA could become established as a portable layer across device generations. If upstreaming of the LLVM backend progresses, reusability of libraries and tools will increase. As a foundation rivaling NVIDIA’s intermediate representation, it will affect the competitive environment.

Questions from the editorial team. In which areas the performance gap between the LEO path and the conventional path will become apparent is in question. To what extent PISA will promote sharing of hand-written libraries is also a point of discussion. Until the full picture of Crescent Island becomes clear, the question remains which abstraction layer developers should invest in.

References

• “Intel Compute Stack Enables LEO For Nova Lake, Introduces Intel Portable ISA “PISA”“, by Michael Larabel — Phoronix, 2026-09-17T13:05:07.000Z (ARR)
• Source URL: https://www.phoronix.com/news/Intel-Compute-Runtime-26.35.397